Location

Headquarters/Sunnyvale Office

Employment Type

Full time

Location Type

On-site

Department

Hardware Departments

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.

This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.

Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.

About The Role

As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration.

Skills and Qualifications

Required:

• 10+ years of physical design/verification experience.

• Strong knowledge of block level and full-chip physical verification methodology.

• Ideal candidate would be someone who has prior experience in 2.5D/3D/CoWoS integration, physical verification (worked on tools like Alegro for CoWoS/2.5D/3D IC), Si/Pi analysis.

• Expert at optimizing for the best power/performance and area.

• Experience with the complete physical design flow.

• Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.

• Expert with IR/EM analysis and resolution.

• Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.

• Demonstrated ability to work with RTL teams to optimize for physical design.

• Knowledge of 2.5D or 3D packaging solutions.

• Must have experience with 3d physical design, 3d die stacking, 3d chip design, die-to-die or wafer-to-wafer.

• Should demonstrate and raise the bar for ownership, deep dive and should demonstrate strong fundamental understanding of PD concepts.

Preferred:

• Experience doing full chip floor planning and integration.

• Knowledge of Synopsys tool suite is a plus.

• Block PD, sta, IR and pdv is good to have.

• Knowledge of clock distribution.

• Knowledge of cooling analysis.

The salary range for this position is $150,000 – $270,000 annually. Actual compensation will be determined based on factors such as experience, skills, qualifications, and location.

Why Join Cerebras

People who are serious about software make their own hardware. At Cerebras, we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

Apply today and become part of the forefront of groundbreaking advancements in AI!

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.