Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law……
Employment is contingent on either verifying the U.S. Person status or obtaining any necessary export license. O Synthesis and timing analysis.…
As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory……
MS/PhD or equivalent experience in Electrical Engineering or a related field. Guide and mentor junior engineers, helping them navigate complex design trade-offs……
Excellent knowledge in using statistical tools for data analysis & insights. In addition, you will help develop and deploy DFT methodologies for our next……
Partner with the top EDA tool vendors to develop new capabilities to support NVIDIA requirements, and with internal CAD to drive efficiency via automations.…
Practical experience with SCAN/MBIST/Test generation tools and processes for large SoC/ASIC. Collaborate with the CAD methodology team to introduce innovative……
Work with PD, DFX, Clocks and other teams to come up with timing closure strategy, develop timing constraints for custom DFT designs, drive timing and power……
As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory……
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.…
Provide post-silicon testing and validation support Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design……
Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law……
Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and……
Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and……
Prior working experience with synthesis tools: Synopsys Fusion/design Compiler. You will help lead to drive the DFT and quality process through the entire……
Prior working experience with synthesis tools: Synopsys Fusion/design Compiler. You will help lead to drive the DFT and quality process through the entire……
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like……
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like……
You will also drive/push state of the art in the areas of testability, debug and quality, in order to aggressively deliver low DPPM's, while optimizing the cost……
Solid knowledge in analog and digital circuit design, and device physics fundamentals. Broadcom offers a competitive and comprehensive benefits package: Medical……
Interfacing with the customer, physical design and test engineering/manufacturing teams located globally. Solid knowledge in analog and digital circuit design,……
Interfacing with the customer, physical design and test engineering/manufacturing teams located globally. Logic BIST design and debug experience.…
§ 120.15 or otherwise eligible for a federally issued export control license. You will play a critical role in ensuring high test coverage, manufacturability,……
Partner with test engineering teams to develop and optimize Automated Test Equipment (ATE) programs for volume production. You may be a good fit if you have.…
Define the DFT architecture of a multi-chip system SOC. involving all aspects of test design functions such as Scan, BIST, Memory Repair, BSD ( ACJTAG/DCJTAG).…
Develop, architect and implement comprehensive DFT structures tailored to specific design requirements, including full-scan, boundary scan, and memory test……
As a DFT Engineer you will work closely with all other design teams – backend, verification and analog, fully responsible for defining, implementing, and……
Primary responsibilities will include Interfacing with the design teams to ensure DFT design rules and guidelines are met. 5+ years of relevant experience.…
Mentor and guide engineers, driving technical excellence and innovation within the team. Familiarity with data analytics tools (Python/pandas, dashboards,……
Use AI to find out how well the skills on your resume fit this job description.
Job Description #body.unify div.unify-button-container .unify-apply-now: focus, #body.unify div.unify-button-container .unify-apply-#body.unify div.unify-button-container .unify-apply-now: focus, #body.unify div.unify-button-container .unify-apply-
Job Title: DFT Engineer
City: Santa Clara
State/Province: California
Posting Start Date: 5/20/26
Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com.
Job Description:
Job Description
Role Purpose
We are hiring a DFT Engineer with hands-on experience in Scan, ATPG, MBIST, or Boundary Scan
Key Responsibilities:
Work on Scan insertion, ATPG, GLS (timing/non-timing)
Implement MBIST and/or Boundary Scan (BSCAN, JTAG)
Support DFT architecture and chip-level integration
Debug DFT issues and improve test coverage
Requirements:
Experience in at least 2 DFT areas (Scan/ATPG/MBIST/BSCAN/GLS)
Strong understanding of DFT concepts and flow
Exposure to end-to-end DFT is a plus
Mandatory Skills: VLSI HVL Verification .
Experience: 5-8 Years .
The expected compensation for this role ranges from $60,000 to $148,500 .
Final compensation will depend on various factors, including your geographical location, minimum wage obligations, skills, and relevant experience. Based on the position, the role is also eligible for Wipro's standard benefits including a full range of medical and dental benefits options, disability insurance, paid time off (inclusive of sick leave), other paid and unpaid leave options.
Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening, subject to applicable state law.
Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.
Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.
#body.unify div.unify-button-container .unify-apply-now: focus, #body.unify div.unify-button-container .unify-apply-#body.unify div.unify-button-container .unify-apply-now: focus, #body.unify div.unify-button-container .unify-apply-
The minimum salary is $60K and the max salary is $149K.
$60K – $149K/yr (Employer provided)
$104K
/yr Median
Santa Clara, CA
If an employer includes a salary or salary range on their job, we display it as "Employer Provided". If a job has no salary data, Glassdoor displays a "Glassdoor Estimate" if available. To learn more about "Glassdoor Estimates," see our FAQ page.
Working here doesn’t have to be a secret
Sign in to browse authentic reviews, anonymous ratings and salary data before you apply.