PCB Layout Engineer Responsibilities:

• Own end-to-end PCB layout for complex, high-density designs used in VR headsets, AR glasses, and wearable computing devices
• Perform high-speed digital layout including DDR, PCIe, USB, and MIPI interfaces with attention to controlled impedance, length matching, and crosstalk mitigation
• Develop and enforce layout design rules for RF, analog, mixed-signal, and power domains within tightly constrained wearable form factors
• Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies
• Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition
• Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets
• Conduct pre- and post-layout signal integrity and power integrity analysis in collaboration with simulation engineers, iterating on routing to meet timing and noise margins
• Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs
• Support hardware bring-up and debug by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards

Minimum Qualifications:

• 6+ years of experience in PCB layout design for high-speed digital, analog, or mixed-signal consumer electronics products
• Experience with high-density interconnect (HDI) and rigid-flex PCB design for space-constrained or wearable hardware
• Experience performing layout for high-speed interfaces such as DDR, PCIe, USB 3.x, or MIPI CSI/DSI with controlled impedance and differential pair routing
• Experience collaborating with electrical and mechanical engineering teams through schematic review, design-for-manufacturability, and hardware bring-up phases
• Proficiency with industry-standard PCB layout tools such as Cadence Allegro, Mentor Xpedition, or equivalent

Preferred Qualifications:

• Experience with rigid-flex stack-up design and flex circuit routing for wearable or compact form-factor hardware
• Knowledge of RF layout techniques including antenna keep-out zones, shielding strategies, and coexistence considerations for wireless wearable products
• Experience designing PCBs for wearable devices, AR/VR headsets, or other miniaturized consumer electronics with strict size, weight, and power constraints
• Familiarity with signal integrity and power integrity simulation tools (e.g., HyperLynx, Sigrity, or equivalent) and ability to interpret simulation results to guide layout decisions

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