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      Encore Semi

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      Encore Semi interviewsEncore Semi Verification Engineer interviewsEncore Semi interview
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      Verification Engineer Interview

      Feb 16, 2015
      Anonymous Interview Candidate
      No offer
      Negative experience

      Application

      I interviewed at Encore Semi

      Interview

      I applied for more than one position online and I got a rude text message to stop submitting my resume to all positions, which did not even identify who the text was from and to which position they were referring to. I had applied to only 3 positions and to same position that was in different location. An ideal response from any company HR would be by email or by a phone call if the position matches and unless already interviewed or even if already interviewed and hired, no company will tell you to stop applying to other positions. The HR hiring for those positions is disrespectful and rude to candidates applying to work for them. After I explained to him/her that I was not applying to random positions, I got an immediate text saying I was not fit for any of their positions.
      12

      Other Verification Engineer Interview Reviews for Encore Semi

      Verification Engineer Interview

      Sep 20, 2015
      Anonymous employee
      Accepted offer
      Positive experience
      Easy interview

      Application

      I applied online. The process took 2 days. I interviewed at Encore Semi in Mar 2014

      Interview

      - 1 phone interview, discussed quite a lot about my experience and previous projects, the the technical interview - see questions below. - 1 phone interview, presentation, soft skills (my strengths/weaknesses, etc - this kind of questions). - I was abroad at that time so the entire screening and interview was over the phone/skype video.

      Interview questions [5]

      Question 1

      - timing questions: setup, hold, slack, critical path, max frequency, what is STA, how to improve the timing, etc
      Answer question

      Question 2

      - code coverage: types, why, how to collect, analysis. Functional coverage: why, how, analysis.
      Answer question

      Question 3

      - channel encoding techniques, examples, why it's needed
      Answer question

      Question 4

      - structure of a typical verification environment, explain each block. Verification closure process. Top/chip level verification, block level reuse techniques.
      Answer question

      Question 5

      - problem solving: 1) write systemverilog properties to verify a given, simple protocol. 2) compute the optimal FIFO depth given the in and out timing specs. 3) Write the RTL for a FSM then synthesize it.
      Answer question
      7

      Encore Semi interviews FAQs

      • Verification Engineer applicants have rated the interview process at Encore Semi with 2 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 50% positive. To compare, the company-average is 75% positive. This is according to Glassdoor user ratings.
      • Candidates applying for Verification Engineer roles take an average of 2 days to get hired, when considering 2 user submitted interviews for this role. To compare, the hiring process at Encore Semi overall takes an average of 24 days.
      • Common stages of the interview process at Encore Semi as a Verification Engineer according to 2 Glassdoor interviews include:

        One on one interview:  33%

        Skills test:  33%

        Phone interview:  33%



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    • Jobs at Encore Semi

      25 jobs in United States
      ASIC Verification Engineer (Remote – USA)
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      $120K - $135K /yr
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      ASIC Verification Engineer (Remote – USA)
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      $120K - $135K /yr
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      ASIC Verification Engineer (Remote – USA)
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      $120K - $135K /yr
      (Employer provided)
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      ASIC Verification Engineer (Remote – USA)
      Santa Clara, CA
      ·
      $120K - $135K /yr
      (Employer provided)
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      ASIC Verification Engineer (Remote - USA)
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      ·
      $120K - $135K /yr
      (Employer provided)
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