Senior Design Engineer applicants have rated the interview process at Intel Corporation with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 73% positive. This is according to Glassdoor user ratings.
Candidates applying for Senior Design Engineer roles take an average of 19 days to get hired, when considering 5 user submitted interviews for this role. To compare, the hiring process at Intel Corporation overall takes an average of 23 days.
Common stages of the interview process at Intel Corporation as a Senior Design Engineer according to 5 Glassdoor interviews include:
One on one interview: 50%
Phone interview: 33%
Group panel interview: 17%
Here are the most commonly searched roles for interview reports -
I applied through an employee referral. The process took 3 weeks. I interviewed at Intel Corporation (Bengaluru) in Jul 2024
Interview
There were three technical rounds conducted by three people. This was followed by one HR round. Finally the hiring manager spent some time talking about my past projects and what they are currently working on.
Interview questions [1]
Question 1
MOS basics, RC circuits, past projects and some basic problem statements like how to improve Bandgap variations across temperature.
I applied online. The process took 2 days. I interviewed at Intel Corporation (Bengaluru) in Jan 2016
Interview
Technical about Setup and Hold equations. Puzzle describing two candles, One candle burns twice more than one candle. Previous project details describing the role and contributions. Some basic verilog questions regarding waveform outcome for a particular code.
I applied online. The process took 2 weeks. I interviewed at Intel Corporation
Interview
lots of interviews and full resume is scanned. Full day is required. there are both face to face and telephonic discussions. overall experience is nice, good exposure to the fab industry
Interview questions [1]
Question 1
questions on various aspects from STA, design implementation, libraries etc