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      Qualcomm interviews FAQs

      • Soc Degital Design Engineer applicants have rated the interview process at Qualcomm with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 62.5% positive. This is according to Glassdoor user ratings.
      • Common stages of the interview process at Qualcomm as a Soc Degital Design Engineer according to 1 Glassdoor interviews include:

        Presentation:  20%

        Other:  20%

        Background check:  20%

        IQ intelligence test:  20%

        One on one interview:  20%

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    • Soc Degital Design Engineer Interview

      Aug 19, 2021
      Anonymous employee
      Accepted offer
      Positive experience
      Average interview

      Application

      I applied online. I interviewed at Qualcomm

      Interview

      4 rounds of interview. Typical digital design questions: vlsi static timing analysis verilog/system verilog fpga/microarchitecture questions academic projects/lab works. few puzzles to test algorithm. Interview is well spread and enough breaks in between. takes typically few weeks to get response. depends on hiring season and how many candidates. typically one should follow up biweekly so that they don't hire any other guy.

      Interview questions [1]

      Question 1

      4 rounds of interview. Typical digital design questions: vlsi static timing analysis verilog/system verilog fpga/microarchitecture questions academic projects/lab works. few puzzles to test algorithm. Interview is well spread and enough breaks in between.
      Answer question

      Jobs at Qualcomm

      581 jobs in United States
      Physical Design Engineer- senior
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      $116K - $173K /yr
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      Senior SoC/RTL Design Engineer
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      Physical Design Engineer - DSP Team
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      ·
      $164K - $246K /yr
      (Employer provided)
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