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      SiFive

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      Core IP RTL Development Interview

      Apr 18, 2022
      Anonymous Interview Candidate
      San Mateo, CA
      No offer
      Neutral experience
      Difficult interview

      Application

      I applied online. The process took 3 weeks. I interviewed at SiFive (San Mateo, CA) in Apr 2022

      Interview

      1 hour initial interview with a mix of technical and behavioral questions. Followed up with two one hour technical interviews back to back. All three interviews were 1 on 1s with members of the development team.

      Interview questions [1]

      Question 1

      A basic search question, some questions about pipelining, a recursion question.
      Answer question

      SiFive interviews FAQs

      • Candidates applying for Core IP RTL Development roles take an average of 21 days to get hired, when considering 1 user submitted interviews for this role. To compare, the hiring process at SiFive overall takes an average of 25 days.
      • Common stages of the interview process at SiFive as a Core IP RTL Development according to 1 Glassdoor interviews include:

        Skills test:  50%

        One on one interview:  50%

      • Here are the most commonly searched roles for interview reports -

        1. Software Engineer(8) ;
        2. Engineer(7) ;
        3. Design Verification Engineer(5) ;
        4. Senior Engineer(4) ;
        5. Staff Engineer(4) ;
        6. ASIC Design Engineer(2) ;
        7. Engineer II(2) ;
        8. Senior Software Engineer(2) ;
        9. Senior Verification Engineer(2) ;
        10. Software Engineer II(2) ;
        11. Vice President(2) .


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      Jobs at SiFive

      33 jobs in United States
      Interconnect Design Engineer
      Santa Clara, CA
      ·
      $159K - $194K /yr
      (Employer provided)
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      Design Verification Engineer II – CPU Subsystem
      Austin, TX
      ·
      $70K - $116K /yr
      (Glassdoor est.)
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      Principal Interconnect Design Engineer
      Santa Clara, CA
      ·
      $231K - $283K /yr
      (Employer provided)
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      CPU Power-Management Design Engineer
      Santa Clara, CA
      ·
      $159K - $194K /yr
      (Employer provided)
      View job
      Staff RTL Design Engineer - CPU LS/PF/MMU
      Santa Clara, CA
      ·
      $179K - $219K /yr
      (Employer provided)
      View job
      View all Core IP RTL Development Jobs