Introduce job responsibility, ask simple questions related to your resume, more questions on FPGA IP verification, including xdc, verilog, timing constraints, etc. that you can learn from master of electrical engineering / digital design courses.
Interview questions [1]
Question 1
Explain set_multicycle_path, how to change start clock, end clock
My resume was floated by a known contact. I had not applied for the position. Since my skills matched with what they were looking for I got a call. The interview was basic, just questions on my resume. But did not receive any response after that. I emailed the manager who took my interview, but she didn't respond and I finally gave up.
Interview questions [1]
Question 1
A question on FIFO depth and Constrained Random Verification
FPGA Verification Engineer applicants have rated the interview process at Xilinx with 2.5 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 50% positive. To compare, the company-average is 63.2% positive. This is according to Glassdoor user ratings.
Common stages of the interview process at Xilinx as a FPGA Verification Engineer according to 2 Glassdoor interviews include:
Phone interview: 100%
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