After you design the hardware in Q1, try to design another hardware to show the index of the bits at the same time.
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
Using only NAND gate to design some logic
Create a NAND gate using only 2:1 muxs.
Where do you see yourself in 5 years
what is the blocking and non-blocking statement in Verilog?
Will you be able to easily commute to the location?
1) FIFO RTL design 2) how to optimize power 3) steps to take ECO
How will you verify for a DAC unit
3. If we use blocking inside always@(posedge clk) how will it be synthesized
Sequence detector for 111
Viewing 131 - 140 interview questions