Most of the things were on ARM architecture, AMBA protocols, SV and UVM, Design concepts and Analytical skills
Verification Engineer Interview Questions
Verification Engineer Interview Questions
Companies rely on verification engineers to ensure that their products work as intended. Prepare to answer questions that will assess your ability to design and implement product testing methods. Expect the interviewer to evaluate your communication and documentation skills, essential when working with product designers.
Top Verification Engineer Interview Questions & How to Answer
Question #1: What skills should a successful verification engineer possess?
Question #2: What information do you need to develop a product test methodology?
Question #3: What techniques do you use when developing a product test?
3,816 verification engineer interview questions shared by candidates
Questions were asked from digital logic design and microcontrollers ,C programming ,OS concepts and a few puzzles.
1. The interview showed a complex SVA and asked me to explain the functionality of the assertion. 2. A C function which reads the value from a specific address. 3. A question about Functional coverage 4. Questions about coverage (code and functional) 5. UVM factory, config_db, 6. Formal verification 7. Processor based verification. Basically they were asking how you verify a Subsystem using C/C++ 8. AHB-AXI bus
Basic Questions; What are your greatest strengths?
program for ring counter and Johnson counter in verilog
program for pattern detector for FSM
write code for generating clock of 50MHz frequency, with 5% jitter and duty cycle.
How my experience is related to the job description.
The interviewer was from a different background, hence there wasn't any question-answer session
Explain what you learned in this course (VHDL, design classes, object oriented programming, etc)
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