How to use muxes to implement an XOR gate?
Verification Specialist Interview Questions
3,820 verification specialist interview questions shared by candidates
Delayed assignment and delayed evaluation in Verilog
Digital questions, UVM environment based questions
Setup/hold time problem; meta-stability; 5-stage pipeline
Sorting, bit logic
First interview: describe a FSM for the result of a sequence of binary input mod 5. Merge sort. Second : C/ verilog coding.
How do you find common elements between the arrays? reduce the complexity, asked me to write the code
Questions related to what you have mentioned on your resume. Digital concepts, FSM related questions, basic Setup and Hold time questions. I was asked a lot of general coding questions, SystemVerilog questions.
caches, computer organization, finite states machines, one C++ algorithm question involving hash tables
1. Describe your current project, contribution and team structure? 2. Write Read and write transactions timing diagram of APB bus. With and without wait states? 3. Find the second largest in the integer array with single iteration. 4. Given a character array of 1000 elements, how do you find, how many times each of the character is repeated? 5. If there is any digital wave coming with random 0s and 1s, how do you find the time difference between 2 successive 1s? 6. Write full & empty conditions for FIFO. What are the verification scenarios of Asynchronous FIFO. 7. Behavioral questions related to personality and team.
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