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( I have just passed out from BTech) First round: 1) Asked about college. 2) Implement 7:1 Mux using 2:1 mux 3) Why verilog is used in this field? 4) Difference between latch and flip flop ( with waveforms). 5) You had C in engineering, why didn't you include it in your resume? C has more use , right? 6) About Major Project ( Why it is not related to VLSI?) 7) Frequency Division Circuit 8) What is the default value of wire? 9) What is the default value of reg? 10 ) Convert one hexadecimal number to binary Second Round 1) Tell me about yourself. ( I was enrolled in a program, asked about that program in detail.) 2) Design an asynchronous flipflop in verilog. 3) What is setup time, hold time? 4) What are the different types of delay and explain them? 5) Differences between RISC and CISC. 6) What are the application of counters? 7) What is a shift register explain its operation with a suitable circuit diagram? 8) Psuedo code for finding prime numbers from 1 to 100. 9) What is LSFR? 10) What is pipelining how it is implemented? 11) Could you draw the symbol of CMOS inverter? 12) What is CMOS? 13) Do you really know python? 14) What did you do in MATLAB? 15) Certifications are not enough, did you do any project related to this? Third Round: 1) Gave an AND OR circuit and asked to convert it into a MUX. 2) Difference between latch and flipflop 3) Draw a latch using only NAND gates. 4) Draw a D latch. 5) Psuedocode for checking a string in a the contents of a file in a directory of files. 6) Is MATLAB a tool or language?
avatar

Design and Verification Engineer

Interviewed at Intel Corporation

3.9★
Aug 19, 2022

( I have just passed out from BTech) First round: 1) Asked about college. 2) Implement 7:1 Mux using 2:1 mux 3) Why verilog is used in this field? 4) Difference between latch and flip flop ( with waveforms). 5) You had C in engineering, why didn't you include it in your resume? C has more use , right? 6) About Major Project ( Why it is not related to VLSI?) 7) Frequency Division Circuit 8) What is the default value of wire? 9) What is the default value of reg? 10 ) Convert one hexadecimal number to binary Second Round 1) Tell me about yourself. ( I was enrolled in a program, asked about that program in detail.) 2) Design an asynchronous flipflop in verilog. 3) What is setup time, hold time? 4) What are the different types of delay and explain them? 5) Differences between RISC and CISC. 6) What are the application of counters? 7) What is a shift register explain its operation with a suitable circuit diagram? 8) Psuedo code for finding prime numbers from 1 to 100. 9) What is LSFR? 10) What is pipelining how it is implemented? 11) Could you draw the symbol of CMOS inverter? 12) What is CMOS? 13) Do you really know python? 14) What did you do in MATLAB? 15) Certifications are not enough, did you do any project related to this? Third Round: 1) Gave an AND OR circuit and asked to convert it into a MUX. 2) Difference between latch and flipflop 3) Draw a latch using only NAND gates. 4) Draw a D latch. 5) Psuedocode for checking a string in a the contents of a file in a directory of files. 6) Is MATLAB a tool or language?

1) Swap in Verilog 2) Print 2D matrix spirally starting from centre 3) randomize the size of a 2D matrix/multi dimentional array 4) Fork-join and how to disable fork 5) Assertions 6) Reverse a string 7) How to verify a vending machine 8) Application of UVM Barrier class, 9) Divide by 5 state machine and extract a mathematical equation to generate the next state , 10) Write a system verilog test to verify if all the clocks on the SOC have been switched off after writing 'b1 to a register , 11) Why do we need UVM agents , 12) How is UVM Scoreboard implemented, 13) Constraint address to word accessible , atleast 2 ways to do it , 14) Test Plan and functional Coverage
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Verification Engineer

Interviewed at Apple

4.1★
Mar 1, 2020

1) Swap in Verilog 2) Print 2D matrix spirally starting from centre 3) randomize the size of a 2D matrix/multi dimentional array 4) Fork-join and how to disable fork 5) Assertions 6) Reverse a string 7) How to verify a vending machine 8) Application of UVM Barrier class, 9) Divide by 5 state machine and extract a mathematical equation to generate the next state , 10) Write a system verilog test to verify if all the clocks on the SOC have been switched off after writing 'b1 to a register , 11) Why do we need UVM agents , 12) How is UVM Scoreboard implemented, 13) Constraint address to word accessible , atleast 2 ways to do it , 14) Test Plan and functional Coverage

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