how to design a FSM using switch-case / shift register
Verification Specialist Interview Questions
3,807 verification specialist interview questions shared by candidates
Verification plan of any given design, assertions, what is coverage?
* Have you used UVM? * What is your knowledge level of SystemVerilog?
Do you have prior experience with UVM and System Verilog
- Switch 2 variable's content without temporary variable. - Create an array with all the numbers from 0 to Size - 1 in random order and without duplicates.
Draw out the circuit simple verilog code would synthesize to
How to convert hexadecimal to decimal.
Design a circuit that takes 4 bit BCD as input and has the input times 5 as output
Draw a NAND using cmos gates
How to verify a design when the frequency change?
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