Recent salaries shared by ASIC Design Verification Engineer II at Capgemini Engineering
Job Title | Years of Experience
Total Pay
Base • Additional pay
Location
Date submitted
Job Title | Years of Experience
Location
Date submitted
Total Pay
Base • Additional pay
No results match your search
Try a different job title or department to explore salaries in related fields.
Capgemini Engineering pay FAQs
- The average salary for ASIC Design Verification Engineer II is $177,981 per year (estimate) in US, which is 26% higher than the average Capgemini Engineering salary of $141,154 per year (estimate) for this job.
- The salary trajectory of a ASIC Design Verification Engineer II ranges between locations and employers. The salary starts at $0 per year (estimate) and goes up to $0 per year (estimate) for the highest level of seniority.
- The estimated average salary for a ASIC Design Verification Engineer II at Capgemini Engineering is $177,981 per year or $86 per hour, but some professionals have reported earning up to roughly $256,019 per year (90th percentile). The typical pay range is between $148,820 (25th percentile) and $215,994 (75th percentile) annually. This is based on 500 salaries submitted by Capgemini Engineering ASIC Design Verification Engineer II professionals on Glassdoor, as of Jun 2026.
- ASIC Design Verification Engineer II professionals typically earn between $72 and $104 per hour.
- ASIC Design Verification Engineer II professionals typically earn between $12,402 and $17,999 monthly.
